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TC90A44P,45P/F
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC90A44P,TC90A45P,TC90A45F
NTSC 2-LINE DIGITAL Y / C SEPARATION IC
The TC90A44P, TC90A45P / F separates luminance (Y) and chrominance (C) signals from NTSC system composite video signal by using 2 horizontal (H) lines separation. The Y / C separation unit for TV and VCR set is able to assembled at low cost, because it requires few external parts and no adjustment.
FEATURES
* * * * * * * * * * TV system : NTSC PLL4 x multiplication circuit sync. tip clamping circuit Internal 8 bit A / D converter Internal 8 bit D / A converters (2 ch.) 1 H line memory Dynamic comb filter Color killer mode (Y / C separation OFF) DIP16 / SOP16 package 5 V single power supply
Weight DIP16-P-300-2.54A : 1.00 g (Typ.) SOP16-P-300-1.27 : 0.18 g (Typ.)
000707EBA1
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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TC90A44P,45P/F
TC90A44P BLOCK DIAGRAM
TC90A45P / F BLOCK DIAGRAM
TERMINAL CONNECTION DIAGRAM
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TC90A44P,45P/F
TERMINAL FUNCTION
PIN No. 1 NAME AVSS FUNCTION Ground for analog components. I/O - INTERFACE CIRCUIT --
2
VRB
ADC bias lower limit reference voltage. This defaults internally to approximately 2.25 V, so this pin should normally be conected to ground (AVSS) through a 0.01 F capacitor.
-
3
VRT
ADC bias higher limit reference voltage. This defaults internally to approximately 2.8 V, so this pin should normally be conected to ground (AVSS) through a 0.01 F capacitor.
-
4
ADIN
Composite video signal input.
I
5
BIAS1
ADC bias voltage. This defaults internally to approximately 1.3 V, so this pin should normally be conected to ground (AVSS) through a 0.01 F capacitor.
-
6
TEST
Test terminal. Normally connected to ground (DVSS).
-
7
KILLER
This pin is switch for color killer circuit. H : For B / W signal, Y / C separation OFF. L : Normal Y / C separation
I
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TC90A44P,45P/F
PIN No. 8 9
NAME DVDD DVSS
FUNCTION Power supply for digital components (+5 V). Ground for digital components.
I/O - -
INTERFACE CIRCUIT - -
10
CKIN
Clock input. After applying capacitor for DC cut, input a color-burst-synchronized fSC clock signal to this pin.
I
11
VFIL
Connect a VCO filter to this pin.
-
12
BIAS3
DAC bias voltage. This defaults internally to approximately 3.4 V, so this pin should normally be conected to ground (AVSS) through a 0.01 F capacitor.
-
13
COUT
Chrominance signal output.
O
14
BIAS2
DAC bias voltage. This defaults internally to approximately 1.7 V, so this pin should normally be conected to ground (AVSS) through a 0.01 F capacitor.
-
15
YOUT
Luminance signal output.
O
16
AVDD
Power supply for analog components (+5 V)
-
-
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TC90A44P,45P/F
FUNCTION BLOCK DESCRIPTIONS
(1) Input clamp (CLAMP) This is sync tip clamp circuit for composite signal. This circuit makes feedback so that the min. data after A / D converter at Y / C separation equal to internal DC bias level. (2) A / D converter (ADC) This is high speed series-parallel 8 bit A / D converter (Dynamic Range: 1.0V). Recommendable Input level is 0.75 Vp-p (Sync tip~white 100%). (3) Line memory This block is DRAM line memory for 1 H delay. (4) Band-pass filter (BPF) This filter extracts the signal of chrominance band from composite video signal. The center frequency is fsc. (5) Dynamic comb filter (DCF) This block is logical comb filter to extract the chrominance signal. Filtering logic applies a correlation of two lines to reduce color dot crawl and cross color. (6) Color killer circuit (KILLER) This block is applied for black and white (B / W) signal regardless of have color burst or no color burts. When pin 10 (KILLER) is "H ", logic stop Y / C separation and output composite video signal from pin 14 (YOUT). (7) PLL (4 times multiply clock generator) This block is 4 times multiplier and makes 4fsc as system clock. This block supplies system clock (4fsc) to each block via buffer and generates timing signal for memories. (8) D / A converter (DAC) This is high speed 8 bit D / A converter. Y output level is 1.73 Vp-p (Typ.). C output level is 437 mVp-p (Typ.). (Input condition is 0.75Vp-p)
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TC90A44P,45P/F
MAXIMUM RATINGS (Ta 25C)
CHARACTERISTIC Power Supply Voltage Input Voltage Power Dissipation Storage Temperature TC90A44P/45P TC90A45F SYMBOL VDD VIN PD (Note) Tstg RATING VSS~VSS + 6.5 -0.3~VDD + 0.3 600 440 -55~125 UNIT V V mW C
(Note) : Ta = 70C
RECOMMENDED OPERATING CONDITION
CHARACTERISTIC Power Supply Voltage Input Voltage Operating Temperature SYMBOL VDD VIN Topr TEST CONDITION - - - MIN. 4.75 0 -10 TYP. 5.00 - - MAX. 5.25 VDD 70 UNIT V V C
ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS (Ta = 25C, VDD = 5 V)
CHARACTERISTIC SYMBOL TEST CIRCUIT 1 1 TEST CONDITION MIN. TYP. MAX. UNIT
Power Supply Voltage Supply Current
VDD IDD YOUT (sync tip) COUT (center) VRB VRT ADIN (sync tip)
4.75 45 2.55
5.00 60 2.70 3.85 2.25 2.8 2.0 1.3 1.7 3.4 1.9 2.3 - -
5.25 75 2.85
V mA
Output Voltage Level
1 3.70 2.15 2.7 CLOCK = 3.579545 MHz VIN = 0.75 Vp-p 1 1.9 1.0 1.2 3.0 1.2 1.8 1 1 4 - 4.00 2.35 2.9 2.1 1.7 2.1 4.0 3.0 2.8 - 1
V
Terminal Voltage Level
BIAS1 BIAS2 BIAS3 VFIL CKIN
V
Input Voltage
High Level Low Level
VIH VIL
V V
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TC90A44P,45P/F
AC CHARACTERISTICS (1)Y output (Ta = 25C, VDD = 5 V, input clock : 3.579545 MHz 0.4 Vp-p, S1 = 1)
CHARACTERISTICS SYMBOL TEST CIRCUIT 1 1 TEST CONDITION MIN. TYP. MAX. UNIT
Input Level Low Frequency Gain Frequency Response Comb Characteristics f2 / f1 f4 / f1 f2 / f3
VIN GV MTF1 MTF2 COMBY
0~140 IRE S2 = 1, S3 = 1, S4 = 2 VIN = 15.73426 kHz, 0.75 Vp-p, Vdc = 2.5 V
- 6.8 -0.8
0.75 7.2 -1.0 -2.0 -46
- 7.7 -2.0 -3.0 -40
Vp-p dB
1 1
S2 = 1, S3 = 1, S4 = 2 VIN = 0.75 Vp-p, Vdc = 2.5 V
-1.5 -
dB dB
S2 = 2, S4 = 2 VIN = 15.73426 kHz, 0.75 Vp-p, Vdc = 2.5 V Output Impedance Zo 1
Zo =
V1 - V2 400 V2
250
400
700
V1 : S3 = 1, V2 : S3 = 2
(Note) : f1 = fH = 15.73426 kHz, f2 = fsc = 3.579545 MHz, f3 = fsc + 1 / 2fH = 3.587412 MHz, f4 = 1 / 3 (4fsc) = 4.772727 MHz
CONDITION OF INPUT SIGNAL
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TC90A44P,45P/F
(2)C output (Ta = 25C, VDD = 5 V, input clock : 3.579545MHz 0.4 Vp-p, S1 = 2)
CHARACTERISTICS SYMBOL TEST CIRCUIT 1 TEST CONDITION MIN. TYP. MAX. UNIT
Gain TC90A44P
CV
S2 = 1, S3 = 1, S4 = 1 VIN = 0.75 Vp-p S2 = 2, S3 = 1, S4 = 2 VIN = 0.75 Vp-p, Vdc = 2.5 V (fsc - 503496 Hz) - (fsc) S2 = 1, S3 = 1, S4 = 2 VIN = 0.75 Vp-p, Vdc = 2.5 V S2 = 1, S3 = 1, S4 = 1 Modulated lamp signal 140 IRE : 0.75 V S2 = 2, S4 = 2 VIN = 15.73426 kHz, 0.75 Vp-p, Vdc = 2.5 V
5.7 -2.5 -1.5 - - 0 0
6.2 -1.9 -1.3 -38 -46 2 2
6.7 -1.5
dB
BPF Characteristics
BWCW TC90A45P / F TC90A44P TC90A45P / F DG DP
1
dB -1.0 -35 -40 5 5 %
Comb Characteristics Differential Gain Differential Phase
COMBC
1
dB
1
Output Impedance
Zo
1
Zo =
V1 - V2 400 V2
250
400
700
V1 : S3 = 1, V2 : S3 = 2
(3)PLL circuit characteristics
CHARACTERISTICS SYMBOL TEST CIRCUIT 1 TEST CONDITION MIN. TYP. MAX. UNIT
Pull-In Frequency Range Input Amplitude (fsc Components)
fck
-
3.5
3.6
3.7
MHz
Vck
1
-
0.35
0.5
-
Vp-p
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TC90A44P,45P/F
TEST CIRCUIT 1
APPLICATION CIRCUIT
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TC90A44P,45P/F
PACKAGE DIMENSIONS
DIP16-P-300-2.54A Unit : mm
Weight : 1.00 g (Typ.)
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TC90A44P,45P/F
PACKAGE DIMENSIONS
SOP16-P-300-1.27 Unit : mm
Weight : 0.18 g (Typ.)
2001-01-16
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